Optimization of FPGA Power Consumption in Computational Algorithms

The Electrical Engineering Department awarded a master’s degree to Fadi Thaer Nasser for his thesis titled “Power Consumption Optimization of FPGA Realization for Computation Algorithms.”

The research focuses on five computational algorithms, including ALU, multiplication, division, k-NN, and SVM. It addresses limitations like high power consumption and large resource utilization, proposing designs to enhance system speed and efficiency. The study distinguishes between static and dynamic power dissipation sources in digital systems. The discussion panel comprised Prof. Dr. Hanan Abdul Redha Akar (Chair), Assoc. Prof. Dr. Uday Abdul Latif Abdul Redha (Member), Assoc. Prof. Dr. Moayad Saadi Karok (Member), and Assoc. Prof. Dr. Ivan Abdul Zahra Hashem (Supervisor).